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  SI5441DC vishay siliconix document number: 71055 s-21251?rev. b, 05-aug-02 www.vishay.com 2-1 p-channel 2.5-v (g-s) mosfet product summary v ds (v) r ds(on) ( ? ) i d (a) 0.055 @ v gs =--4.5v ? 5.3 -- 2 0 0.06 @ v gs =--3.6v ? 5.1 0.083 @ v gs =--2.5v ? 4.3 1206-8 chipfe t t d d d g d d d s 1 s g d p-channel mosfet bottom view marking code ba xx lot traceability and date code part # code ordering information: SI5441DC-t1 absolute maximum ratings (t a =25 _ c unless otherwise noted) parameter symbol 5 secs steady state unit drain-source voltage v ds -- 2 0 v gate-source voltage v gs ? 12 v c o n t i n u o u s d r a i n c u r r e n t ( t j = 1 5 0 _ c ) a t a =25 _ c i d ? 5.3 ? 3.9 c on t i nuous d ra i n c urren t ( t j = 1 5 0 _ c ) a t a =85 _ c i d ? 3.8 ? 2.8 a pulsed drain current i dm ? 20 a continuous source current a i s -- 2 . 1 -- 1 . 1 m a x i m u m p o w e r d i s s i p a t i o n a t a =25 _ c p d 2.5 1.3 w maximum power dissipation a t a =85 _ c p d 1.3 0.7 w operating junction and storage temperature range t j ,t stg --55 to 150 _ c soldering recommendations (peak temperature) b, c 260 _ c thermal resistance ratings parameter symbol typical maximum unit m i j t i t a b i t a t 5sec r 40 50 maximum junction-to-ambient a steady state r thja 80 95 _ c/w maximum junction-to-foot (drain) steady state r thjf 15 20 c / notes a. surface mounted on 1? x 1? fr4 board. b. see reliability m anual for profile. the chipfet is a leadless package. the end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. a solder f illet at the exposed c opper tip cannot be guaranteed and is not required to ensure adequate bottom side solder intercon- nection. c. rework conditions: manual soldering with a soldering iron is not recommended for leadless components.
SI5441DC vishay siliconix www.vishay.com 2-2 document number: 71055 s-21251?rev. b, 05-aug-02 specifications (t j =25 _ c unless otherwise noted) parameter symbol test condition min typ max unit static gate threshold voltage v gs(th) v ds =v gs ,i d = --250 m a -- 0 . 6 v gate-body leakage i gss v ds =0v,v gs = ? 12 v ? 100 na z e r o g a t e v o l t a g e d r a i n c u r r e n t i d s s v ds =--16v,v gs =0v -- 1 m a zero gate voltage drain current i dss v ds =--16v,v gs =0v,t j =85 _ c -- 5 m a on-state drain current a i d(on) v ds ? -- 5 v, v gs =--4.5v -- 2 0 a v gs =--4.5v, i d =--3.9a 0.046 0.055 drain-source on-state resistance a r ds(on) v gs =--3.6v,i d =--3.7a 0.050 0.06 ? d s ( o n ) v gs =--2.5v,i d =--3.1a 0.070 0.083 forward transconductance a g fs v ds =--10v,i d =--3.9a 12 s diode forward voltage a v sd i s =--1.1a,v gs =0v -- 0 . 8 -- 1 . 2 v dynamic b total gate charge q g 11 22 gate-source charge q gs v ds =--10v, v gs =--4.5v,i d =--3.9a 3.0 nc gate-drain charge q gd 2.5 turn-on delay time t d(on) 20 30 rise time t r v d d =--10 v ,r l =10 ? 35 55 turn-off delay time t d(off) v d d = - - 1 0 v , r l = 1 0 ? ? -- 1 a , v gen =--4.5v,r g =6 ? 65 100 ns fall time t f 45 70 source-drain reverse recovery time t rr i f = --1.1 a, di/dt = 100 a/ m s 30 60 notes a. pulse test; pulse width 300 m s, duty cycle 2%. b. guaranteed by design, not subject to production testing. typical characteristics (25 _ c unless noted) 0 4 8 12 16 20 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 4 8 12 16 20 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v gs =5thru3v t c =--55 _ c 125 _ c 2v 25 _ c output characteristics transfer characteristics v ds -- drain-to-source voltage (v) -- drain current (a) i d v gs -- gate-to-source voltage (v) -- drain current (a) i d 1.5 v 2.5 v
SI5441DC vishay siliconix document number: 71055 s-21251?rev. b, 05-aug-02 www.vishay.com 2-3 typical characteristics (25 _ c unless noted) -- on-resistance ( r ds(on) ? ) 0 300 600 900 1200 1500 1800 048121620 0.6 0.8 1.0 1.2 1.4 1.6 --50 --25 0 25 50 75 100 125 150 0 1 2 3 4 5 036912 0.00 0.05 0.10 0.15 0.20 048121620 v ds -- drain-to-source voltage (v) c rss c oss c iss v ds =10v i d =3.9a i d -- drain current (a) v gs =4.5v i d =3.9a v gs =3.6v v gs =2.5v gate charge on-resistance vs. drain current -- gate-to-source voltage (v) q g -- total gate charge (nc) c -- capacitance (pf) v gs capacitance on-resistance vs. junction temperature t j -- junction temperature ( _ c) (normalized) -- on-resistance ( r ds(on) ? ) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.00 0.05 0.10 0.15 0.20 012345 t j = 150 _ c t j =25 _ c i d =3.9a 20 10 1 source-drain diode forward voltage on-resistance vs. gate-to-source voltage -- on-resistance ( r ds(on) ? ) v sd -- source-to-drain voltage (v) v gs -- gate-to-source voltage (v) -- source current (a) i s v gs =4.5v
SI5441DC vishay siliconix www.vishay.com 2-4 document number: 71055 s-21251?rev. b, 05-aug-02 typical characteristics (25 _ c unless noted) 0 30 50 10 20 power (w) single pulse power time (sec) 40 1 100 600 10 10 -- 1 10 -- 2 10 -- 3 10 -- 3 10 -- 2 1 10 600 10 -- 1 10 -- 4 100 -- 0 . 2 0.0 0.2 0.4 0.6 --50 --25 0 25 50 75 100 125 150 i d = 250 m a 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 threshold voltage variance (v) v gs(th) t j -- temperature ( _ c) normalized thermal transient impedance, junction-to-ambient square wave pulse duration (sec) normalized effective transient thermal impedance 1. duty cycle, d = 2. per unit base = r thja =80 _ c/w 3. t jm -- t a =p dm z thja (t) t 1 t 2 t 1 t 2 notes: 4. surface mounted p dm 10 -- 3 10 -- 2 110 10 -- 1 10 -- 4 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 normalized thermal transient impedance, junction-to-foot square wave pulse duration (sec) normalized effective transient thermal impedance


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